TEL / TOKYO ELECTRON

There are an increasing variety of test requirements in conjunction with diversified device design, device application, process node shrink and package design complexity. To reduce total test cost, especially in Memory applications, multi-site probe cards were introduces as a way of reducing test cost. This method found its limit when single wafer/one-touch-down probe card technology appeared. Cellcia™ is a breakthrough technology. Splitting wafer lots into the Cellcia™ multi-cell probe system, reduces test turn-around-time and improves system footprint by adopting a multi-layer structure. Conventional prober technology cannot achieve the Cellcia™ throughput with similar floor space. The Cellcia™ system maximizes test efficiency and minimizes total test cost. TEL has combined its vast wafer probe experience and front-end process technologies to develop the world’s leading probe system, Cellcia™.

TEL / TOKYO ELECTRON

CELLCIA

Probers

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TEL / TOKYO ELECTRON

CELLCIA

TEL / TOKYO ELECTRON

CELLCIA

CELLCIA

Probers

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TEL / TOKYO ELECTRON

CELLCIA

TEL / TOKYO ELECTRON

CELLCIA