Description
No descriptionConfiguration
Mesa Twin 3chOEM Model Description
Applied Centris AdvantEdge Mesa Etch, the smartest, fastest silicon etch system made for the volume production of the world’s most advanced memory and logic chips. Featuring an unprecedented eight process chambers – six etch and two plasma clean chambers – the compact Centris system can process up to 180 wafers per hour, lowering the per-wafer cost by up to 30%. Proprietary system intelligence software assures every process on every chamber precisely matches, delivering angstrom-level uniformity on every wafer – a critical requirement for high yield in tomorrow’s highly-complex chip designs.Documents
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APPLIED MATERIALS (AMAT)
CENTRIS ADVANTEDGE MESA ETCH
Verified
CATEGORY
Dry / Plasma Etch
Last Verified: Yesterday
Key Item Details
Condition:
Used
Operational Status:
Unknown
Product ID:
117096
Wafer Sizes:
12"/300mm
Vintage:
2010
Have Additional Questions?
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
APPLIED MATERIALS (AMAT)
CENTRIS ADVANTEDGE MESA ETCH
CATEGORY
Dry / Plasma Etch
Last Verified: Yesterday
Key Item Details
Condition:
Used
Operational Status:
Unknown
Product ID:
117096
Wafer Sizes:
12"/300mm
Vintage:
2010
Have Additional Questions?
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
Description
No descriptionConfiguration
Mesa Twin 3chOEM Model Description
Applied Centris AdvantEdge Mesa Etch, the smartest, fastest silicon etch system made for the volume production of the world’s most advanced memory and logic chips. Featuring an unprecedented eight process chambers – six etch and two plasma clean chambers – the compact Centris system can process up to 180 wafers per hour, lowering the per-wafer cost by up to 30%. Proprietary system intelligence software assures every process on every chamber precisely matches, delivering angstrom-level uniformity on every wafer – a critical requirement for high yield in tomorrow’s highly-complex chip designs.Documents
No documents