Description
There are some missing parts that cannot be used normally. Missing Parts: PM1: MMC qty 1 PM2: MMC qty 1 PM1: Ring Tilt Mechanism Lift Unit qty 1 PM2: Ring Tilt Mechanism Lift Unit qty 1Configuration
Rapid Thermal Processing Device After verifying with on-site personnel, it was confirmed that "the quartz inside the chamber is still intact and usable during the shutdownOEM Model Description
Helios family RTP systems offer unique double-side heating RTP technology. It can achieve the highest wafer temperature ramp rate while balancing wafer frontside and backside temperatures, eliminate pattern-loading effect, provide unique wafer stress management capabilities, satisfy technical requirements for RTP processes with different substrate thickness and device structures, and achieve the highest system productivity at the same time.Documents
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MATTSON
HELIOS
Verified
CATEGORY
RTP/RTA
Last Verified: Over 60 days ago
Key Item Details
Condition:
Used
Operational Status:
Unknown
Product ID:
75593
Wafer Sizes:
12"/300mm
Vintage:
2008
Have Additional Questions?
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
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MATTSON
HELIOS
CATEGORY
RTP/RTA
Last Verified: Over 60 days ago
Key Item Details
Condition:
Used
Operational Status:
Unknown
Product ID:
75593
Wafer Sizes:
12"/300mm
Vintage:
2008
Have Additional Questions?
Logistics Support
Available
Money Back Guarantee
Available
Transaction Insured by Moov
Available
Refurbishment Services
Available
Description
There are some missing parts that cannot be used normally. Missing Parts: PM1: MMC qty 1 PM2: MMC qty 1 PM1: Ring Tilt Mechanism Lift Unit qty 1 PM2: Ring Tilt Mechanism Lift Unit qty 1Configuration
Rapid Thermal Processing Device After verifying with on-site personnel, it was confirmed that "the quartz inside the chamber is still intact and usable during the shutdownOEM Model Description
Helios family RTP systems offer unique double-side heating RTP technology. It can achieve the highest wafer temperature ramp rate while balancing wafer frontside and backside temperatures, eliminate pattern-loading effect, provide unique wafer stress management capabilities, satisfy technical requirements for RTP processes with different substrate thickness and device structures, and achieve the highest system productivity at the same time.Documents
No documents